In the processing and packaging of semiconductor devices (e.g., BGA devices), an integrated circuit device (e.g., a semiconductor die or chip) is often mounted on a top surface of a multi-layer printed circuit board, where the printed circuit board includes plated vias that extend from the top surface of the printed circuit board to a bottom surface of the printed circuit board. Solder balls are conductively coupled (e.g., using a solder reflow process) to contact pads of the plated vias on the bottom surface of the printed circuit board. Wire bonds conductively couple (1) contact pads of the plated vias on the top surface of the printed circuit board with (2) a portion of the integrated circuit device (e.g., contact pads on the integrated circuit device). Thus, the contact pads of the integrated circuit device are conductively coupled to the solder balls through the plated vias of the printed circuit board.
Unfortunately, such conventional processing and packaging of integrated circuit devices suffers from excessive costs and complex processes. Furthermore, electrical performance is often compromised due to these complex processes and material sets. For example, the multi-layer printed circuit board used to support the integrated circuit devices tends to be expensive. Likewise, the solder ball material and the associated reflow process also tend to be quite expensive.
Thus, it would be desirable to provide a method of processing semiconductor/integrated circuit devices that overcomes one or more of the above-recited deficiencies.